Substrate / Advanced Packaging Design Engineer – Multi-Die Chip - Eridu AI : Job Details

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We're building a next-gen Networking chip—and need a hands-on substrate layout expert to help design our multi-die, chiplet-based package from the ground up.

This is a high-impact, on-site role focused on advanced organic substrate layout, routing feasibility, and co-design alignment across floorplanning, mechanical, and system-level constraints. You'll be part of a small, expert team shaping the physical implementation of a first-of-its-kind high-performance package.

Eridu AI is a Silicon Valley hardware startup focused on accelerating training and inference performance for large AI models. Today's AI model performance is often gated by infrastructure bottlenecks. Eridu AI introduces multiple industry-first innovations across semiconductors, software and systems to deliver solutions that improves AI data center performance to increase GPU utilization while simultaneously reducing capex and power. Eridu AI's solution and value proposition have been widely validated with several hyperscalers.

The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World's leading micro-LED display company and developer of the first augmented reality contact lens).

Position Overview

We are seeking an experienced Substrate Design Engineer to support the development of an advanced multi-die substrate based package that integrates multiple dies in a chiplet format within a high-density, high-performance substrate. This role focuses on physical layout of the substrate, routing feasibility, and co-design alignment with floor planning, mechanical, and system constraints.

The successful candidate will collaborate closely with package integration, signal/power integrity, and system mechanical teams to ensure successful layout implementation and manufacturability for a complex multi-chip package.

If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking.

Responsibilities

• Drive physical layout of high-density substrate designs for advanced multi-die packages, including planning of bump maps, escape routing, via structures, and layer stack-ups.
• Assess routing feasibility in a co-design environment, considering die floorplans, IO bump placement, and mechanical constraints at both the component and system levels.
• Collaborate with system architects, packaging engineers, and mechanical teams to align on floor planning strategies and package mechanical outlines.
• Optimize signal, power, and ground integrity through intelligent routing, layer usage, and design constraint enforcement.
• Execute DRC, DFM, and manufacturing rule checks to ensure design readiness for fabrication and assembly.
• Generate and release final design packages and interface with substrate vendors for fabrication.
• Support technical reviews of substrate layouts and iterate with internal and external stakeholders on design improvements.

Qualifications

• 8+ years of experience in advanced substrate layout for high-performance IC packaging, with direct involvement in multi-die or chiplet-based designs.
• Proven expertise in organic substrate layout with high routing density, fine-pitch bump escape, and constrained layer stack-ups.
• Strong understanding of co-design methodology, including interactions between floorplan, substrate layout, and system mechanical boundaries.
• Proficient with Allegro Cadence APD, AutoCAD design tools.
• Familiarity with SI/PI design principles and how organic substrate layout impacts electrical performance.
• Experienced in working with OSATs or substrate suppliers for design tape-out and manufacturability validation
• Excellent communication and documentation skills.
• Bachelor's degree in Electrical, Mechanical, or Packaging Engineering, or equivalent experience.

Why Join Us?

At Eridu AI, you'll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.

Seniority level

• Seniority levelMid-Senior level

Employment type

• Employment typeContract

Job function

• IndustriesComputer Hardware Manufacturing, Computers and Electronics Manufacturing, and Semiconductor Manufacturing

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