Senior Design Verification Engineer (Contract)
No C2C
About the Role
A cutting-edge AI hardware company is looking for a contract based Design Verification Engineer to help validate high-performance digital designs. You'll be joining a team focused on building next-gen compute architectures that push the limits of speed, scalability, and AI capability.
This is a senior-level IC verification role, best suited for engineers who thrive in fast-paced environments, enjoy working with custom CPU architectures, and have deep UVM/SystemVerilog experience.
Key Responsibilities
- Develop and execute block- and system-level verification plans for complex digital logic
- Build reusable UVM testbenches and contribute to simulation infrastructure
- Create and debug SystemVerilog assertions, checkers, and coverage models
- Collaborate with design teams to validate RTL functionality, performance, and power behavior
- Use industry-standard tools to analyze results, report issues, and drive closure
- Provide mentorship and technical leadership to junior DV engineers
- Recommend improvements to verification strategy, test coverage, and automation flows
Requirements
- 5+ years of hands-on experience in ASIC or SoC verification
- Deep knowledge of SystemVerilog, UVM, and simulation best practices
- Experience with functional coverage, assertion-based verification, and debugging complex RTL
- Strong scripting ability in Python, Perl, or C/C++
- Familiarity with standard EDA tools (Synopsys, Cadence, or Mentor)
- Excellent problem-solving, communication, and documentation skills
- Comfortable working across hardware, architecture, and systems teams
Bonus Skills
- Experience with Python-driven verification frameworks (Cocotb, PyUVM)
- Exposure to RISC-V, custom CPUs, or AI/ML accelerators
- Knowledge of emulation, formal tools, or post-silicon bring-up
Contract Details
- 6–12 month contract, with possible extension
- Hybrid work environment
- Competitive rate depending on experience and scope
Unfortunately, we are unable to consider H1b transfers for this project. This is only open to GC holders or Citizens.