Job Location : Yorktown Heights,NY, USA
Introduction
IBM Quantum is seeking talented engineers to join the quantum hardware design/simulation team at the IBM Thomas J. Watson Research Center in Yorktown Heights, NY. The team focuses on delivering quantum processor and processor-adjacent designs to meet a variety of internal needs, and develops and drives the methodology to make these designs successful. Designs span in scope from exploratory research to production-roadmap quantum processor unit development.
Your role and responsibilities
The successful candidate will be responsible for driving and executing against a coherent high-level strategy for effective delivery of designs using IBM Quantum's internal technologies, including roadmap quantum processing units. This strategy encompasses broad release methodology, process design kit (PDK) management, and coordination across multiple sites. This is a critical role for IBM Quantum's quantum hardware mission, and involves working closely with the fabrication/integration, EDA, design, and test teams to continually innovate on all aspects of the release process.
Applicants are expected to have familiarity with industry standards for chip design/release methodologies (in CMOS and/or experimental technologies) and relevant hardware development tools such as Keysight ADS, Ansys Electronics Desktop, Cadence Virtuoso/Spectre etc. Experience with microwave engineering and/or development for industry-grade physical verification sign-off tools such as Siemens Calibre (SVRF coding), Synopsys IC Validator (PXL coding), Cadence Pegasus/PVS (PVL coding) etc. is strongly preferred, as is experience with continuous integration/continuous deployment methodologies. Because the role includes collaboration between several diverse and dynamic teams of technical and operations personnel, good communication skills, initiative, and a strong sense of responsibility are key.
Responsibilities include:
Technical leadership for internal-technology PDK strategy and release methodology
Participation in physical verification PDK component development tasks as needed (e.g., DRC/LVS/modeling/design environment/OA technology definition etc.)
Project management/scheduling for PDK component releases
Required technical and professional expertise
Master's degree or higher in engineering, physics, or computer science
CMOS design release (tapeout) experience in Cadence/Synopsys/Keysight design frameworks
Experience with CMOS PDK deployment/administration
Technical project management
Git
Linux
Python
Preferred technical and professional experience
Physical verification deck coding languages: SVRF/PXL/PVL/etc.
Microwave engineering
Experience in unconventional/experimental technologies
CI/CD frameworks
OpenAccess
IBM is committed to creating a diverse environment and is proud to be an equal-opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.